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orderin g numbe r : ena1567 bi-cmos lsi class-d audio power amplifier with built-in headphone ampifier btl 15w 2ch LV49157V overview the LV49157V is a 15w per chan nel stereo digital power amplifier that takes analog inputs. the LV49157V uses unique sanyo-developed feedback technology to achieve excellent audio quality despite being a class d amplifier and can be used to implement high quality flat display panel (fdp) based systems. features ? btl output, class d amplifier system ? unique sanyo-developed feedback technology achieves superb audio quality ? high-efficiency class d amplifier ? soft muting function reduces impulse noise at power on/off ? full complement of built-in protection circuits : over current protection, thermal protection, and low power supply voltage protection circuits ? built in power limiter ? built in headphone amplifier functions ? power : 15w 2ch output (vd = 15v, r l = 8 , fin = 1khz, aes17, thd + n = 10%) ? efficiency : 93% (vd = 15v, r l = 8 , fin = 1khz, p o = 15w) ? thd + n : 0.08% (vd = 15v, r l = 8 , fin = 1khz, p o = 1w, filter : aes17) ? noise : 90 vrms (filter : a-weight) ? 60mw stereo headphone amplifier (vd = 15v, r l = 16 , thd + n = 10%) ? package ssop44j (275mil) specifications of any and all sanyo semiconductor co.,l td. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer ' s products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' sproductsor equipment. any and all sanyo semiconductor co.,ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, av equipment, communication device, office equipment, industrial equ ipment etc.). the products mentioned herein shall not be intended for use for any "special application" (medica l equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, t ransportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of re liability and can directly threaten human lives in case of failure or malfunction of the product or may cause har m to human bodies, nor shall they grant any guarantee thereof. if you should intend to use our products for app lications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. if there is n o consultation or inquiry before the intended use, our customer shall be solely responsible for the use. n0409 sy 20090918-s00001 no.a1567-1/30
LV49157V no.a1567-2/30 specifications absolute maximum ratings at ta = 25 c parameter symbol conditions ratings unit maximum supply voltage vd supply voltage 20 v allowable power dissipation pd max our pcb, soldered * 5 w our pcb, soldered * 2.1 c/w package thermal resistance jc our pcb, not soldered * 3.6 c/w maximum junction temperature tj max 150 c operating temperature topr -25 to +75 c storage temperature tstg -50 to +150 c * : mounted on a specified board 110.0mm 100.0mm 1.5mm, glass epoxy (two-layer) recommended operating range at ta = 25 c ratings parameter symbol conditions min typ max unit supply voltage range vd supply voltage 9 15 18 v r l speaker load 4 8 load impedance range r l (hp) headphone 16 electrical characteristics at ta = 25 c, vd = 15v ratings parameter symbol conditions min typ max unit main amplifier ( r l = 8 ,l = 33 h (toko : a7502by-330m), c = 0.1 f,cl=0.47 f) standby current ist stby = l, mute = l 1 10 a mute current imute stby = h, mute = l 14 20 26 ma quiescent current i cco stby = h, mute = h 35 45 55 ma voltage gain vg fin = 1khz, v o = 0dbm 28 30 32 db offset voltage voffset rg = 0 -150 150 mv total harmonic distortion thd+n p o = 1w, fin = 1khz, aes17 0.08 0.4 % output power p o thd+n = 10%, aes17 13 15 w channel separation ch sep. rg = 0, v o = 0dbm, din audio 55 70 db ripple rejection ratio svrr fr = 100hz, vr = 0dbm, rg = 0, din audio 50 60 db noise v no rg = 0, a-weight 90 300 vrms high-level input voltage v ih stby and mute pin 3 vd v low-level input voltage v il stby and mute pin 0 1 v under voltage protection upper uv_upper vd voltage measure 8.0 v under voltage protection lower uv_lower vd voltage measure 7.0 v headphone amplifier( r l = 16 ,fin=1khz) quiescent current i cco hp_stby = h 8 12 ma voltage gain vg v o = -10dbm 9.5 11.5 13.5 db total harmonic distortion thd+n p o = 10mw, din audio 0.05 0.3 % output power p o thd+n = 10%, din audio 48 60 72 w channel separation ch sep. fin=1khz, rg = 0, v o = -10dbm, din audio 55 70 db ripple rejection ratio svrr fr = 100hz, vr = 0dbm, rg = 0, din audio 55 70 db noise v no rg = 0, a-weight 12 60 vrms high-level input voltage v ih hp_stby pin 3 vd v low-level input voltage v il hp_stby pin 0 1 v note : the values of these characteristics were measured in the sanyo test environmen t. the actual values in an end system will vary depending on the printed circuit board pattern, the external components actually used, and other factors.
LV49157V package dimensions unit : mm (typ) 3285 sanyo : ssop44j(275mil) 7.6 15.0 0.65 5.6 (0.68) (1.5) 44 23 1 22 0.22 0.5 0.2 1.7max side view bottom view top view exposed die-pad pd max - ta 0 6 4 2 8 ? 25 100 125 75 25 50 0 150 ambient temperature, ta - c allowable power dissipation, pd max - w soldered = 5.05w not soldered = 3.35w mounted on a specified board : 110 100 1.5mm 3 glass epoxy (two-layer) pin assignment 23 22 24 21 25 20 26 19 27 18 28 17 29 16 30 15 31 14 32 13 33 12 34 11 35 10 36 9 37 8 38 7 39 6 40 5 41 4 42 3 43 2 44 1 lv49157 pvd1 pvd1 out1 + out1 + boot1 + v dd 1 boot1 - out1 - out1 - pgnd1 pgnd1 pgnd2 pgnd2 out2 - out2 - boot2 - v dd 2 boot2 + out2 + out2 + pvd2 pvd2 v in 1 + v in 1 - plc v in 2 - v in 2 + mutecap v cc biascap vbias vreg5 gnd hp_in1 hp_rf hp_in2 hp_gnd1 hp_out1 hp_ref hp_out2 hp_gnd2 hp_stby top view mute stby no.a1567-3/30
LV49157V block diagram and application circuit 44 43 42 41 40 39 38 37 36 32 31 30 29 28 27 26 25 24 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 sp + 0-5v 0-5v v in 1 + mute v in 2 - vreg5 vbias biascap v cc mutecap hp_rf hp_gnd1 hp_out1 hp_ref hp_out2 hp_gnd2 hp_stby gnd stby v in 1 - plc pvd1 boot1 - v dd 1 boot2 - out2 - out2 + out2 + out2 - out1 - out1 + out1 + boot2 + boot1 + v dd 2 out1 - pgnd2 pgnd2 35 34 33 pgnd1 fb fb fb fb pgnd1 pvd1 pvd2 19 20 21 22 v in 2 + + + vd 23 pvd2 sp rec. & cont. output output start sequence power limiter output output rec. & cont. hp_in1 hp_in2 + + rl(hp) + rl(hp) 0-5v head phone no.a1567-4/30
LV49157V pin equivalent circuit pin no. pin name i/o description equivalent circuit 1 mute i mute control pin 1 250k 100k 10k gnd vd 2 stby i standby control pin 2 250k 100k 10k gnd vd 3 v in 1 + i input pin, ch1 plus 3 300 30k gnd vbias vd 4 v in 1 - i input pin, ch1 minus 4 300 30k gnd vbias vd 5 plc i power level control pin 5 200 gnd vd continued on next page. no.a1567-5/30
LV49157V continued from preceding page. pin no. pin name i/o description equivalent circuit 6 v in 2 - i input pin, ch2 minus 6 300 30k gnd vbias vd 7 v in 2 + i input pin, ch2 plus 7 300 30k gnd vbias vd 8 mutecap o muteing sysytem capcitor connection 8 10k 20k gnd v dd vd 9 v cc o internal power supply decupling capacitor connection 9 gnd vd 10 biascap o internal regulator decupling capacitor connection 1k 100k 100k 1k 10 gnd vd continued on next page. no.a1567-6/30
LV49157V continued from preceding page. pin no. pin name i/o description equivalent circuit 11 vbias o internal regulator decupling capacitor connection 11 500 500 gnd vd 12 vreg5 o internal regulator decupling capacitor connection 12 500 gnd vd 13 gnd analog ground 14 hp_in1 i headphone ch1 input 15 hp_rf o internal regulator decupling capacitor connection 16 hp_in2 i headphone ch2 input 14 hp_gnd vref vd prevd 15 hp_gnd vd 16 hp_gnd vref vd prevd continued on next page. no.a1567-7/30
LV49157V continued from preceding page. pin no. pin name i/o description equivalent circuit 17 hp_gnd1 headphone ground 18 hp_out1 o headphone ch1 output 19 hp_ref o internal regulator decupling capacitor connection 20 hp_out2 o headphone ch2 output 21 hp_gnd2 18 hp_gnd vd 19 hp_gnd prevd 20 no.a1567-8/30 headphone ground 22 hp_stby i headphone amplifier standby control pin 23 pvd2 ch2 power supply 24 pvd2 ch2 power supply 25 out2 + o output pin, ch2 plus 25 gnd vd continued on next page. hp_gnd vd 22 gnd vd
LV49157V continued from preceding page. pin no. pin name i/o description equivalent circuit 26 out2 + o output pin, ch2 plus 26 gnd vd 27 boot2 + i/o boot strap pin, ch2 plus 28 v dd 2 o ch2 internal regulator decupling capacitor connection 29 boot2 - i/o boot strap pin, ch2 minus 30 out2 - o output pin, ch2 minus 30 gnd vd 31 out2 - o output pin, ch2 minus 31 gnd vd 32 pgnd2 ch2 power ground 33 pgnd2 ch2 power ground 34 pgnd1 ch1 power ground 35 pgnd1 ch1 power ground 36 out1 - o output pin, ch1 minus 36 gnd vd 37 out1 - o output pin, ch1 minus 37 gnd vd 38 boot1 - i/o boot strap pin, ch1 minus 39 v dd 1 o ch1 internal regulator decupling capacitor connection 40 boot1 + i/o boot strap pin, ch1 plus continued on next page. no.a1567-9/30
LV49157V continued from preceding page. pin no. pin name i/o description equivalent circuit 41 out1 + o output pin, ch1 plus 41 gnd vd 42 out1 + o output pin, ch1 plus 42 gnd vd 43 pvd1 ch1 power supply 44 pvd1 ch1 power supply no.a1567-10/30
LV49157V operation mode summary stby mode ( stby = l, mute = l and hp_stby = l) each bias becomes off state when the re gulator in ic has been turned off. the most of circuits becomes off state. the supply current : 1 a (typical). mute mode ( stby = h and mute = l) each bias becomes on state when the regulator in ic has been turned on. when more than half of the circuits are active, the amplifier in the output stages become off. the supply current : 20ma (typical). operation mode ( stby = h, mute = h and hp_stby = h) the LV49157V operates as d-class am plifier and headphone amplifier. the output signal is synchronized with the input signal. the current of the main amplifier is 45ma (typical) in our recommendation condition, and the current of the headphone amplifier is 8ma (typical) at rg=0. main amplifier function image no.a1567-11/30
LV49157V on time/off time secure and control on time and off ti me about the control of the terminal stby and the terminal mute for the pop noise decrease. the following, on time, and off time are the recommendation and set time in our recommendation constant. on time please secure on time of 350msec or more for reducing pop noise. function image on time ? ? ? the time until the mute pin is set to high level after the stby pin is set to high level off time please secure off time of 1000msec or more for reducing pop noise. function image off time ? ? ? the time until the stby pin is set to low level after the mute pin is set to low level no.a1567-12/30
LV49157V soft mute the soft mute circuit is able to use fade in/fade out function, and the main amplifier can set rise time and fall time by the time constant of the mutecap capacitor. main amplifier fade in mute rise time is applpx.450msec in our recommended external components. 5v/div. mute pin mutecap pin [out + ] vs [out - ] mute rise time main amplifier fade in function image main amplifier fade out mute fall time is applpx.450msec in our recommended external components. 5v/div. mute pin mutecap pin [out + ] vs [out - ] mute fall time main amplifier fade out function image no.a1567-13/30
LV49157V the headphone amplifier can set rise time and fall time by the time constant of the hp_rf capacitor. headphone amplifier fade in rise time is applpx.900msec in our recommended external components. hp_stby pin hp_rf terminal hp_out rise time headphone amplifier fade in function image headphone amplifier fade out fall time is applpx.900msec in our recommended external components. hp_stby pin hp_rf terminal hp_out fall time headphone amplifier fade out function image no.a1567-14/30
LV49157V power supply lowering protection circuit since the instable operation in the low voltage is prevented by using this circuit, after the voltage of the pvd pin is monitored and the voltage below the attack volta ge (pvd = 8v typ.), amp is turned off. also, to prevent the instable operation when the voltage of the pvd pin is decreased by an y cause during operations, the attack voltage (pvd = 7v typ.) is set. the voltage of attack and recover has hysteresis (about 1v) to prevent on/off continuous action of the power supply lowering protection circuit. function image also, this ic is designed to turn off amp in the same seque nce that the mute is on as a pop noise measures when the plug of products are put off. over current protection circuit the over current protection circuit is a protection circuit * to protect the output dmos from the over current and corresponds to any mode of the po wer supply, gnd and a load short. the protection operation is performed when the current reaches the detection current value set out in ic and the output dmos is compulsorily turned off for about 20 sec. after compulsorily tuning off the output dmos, when the amp lifier is automatically reset in usual operation and the over current flows continuously, the protec tion operation is performed again. function image * the over current protection circuit is a function to avoid the abnormal state like the output short-circuit temporarily. unfortunately, we cannot guarantee that ic is not destroyed. no.a1567-15/30
LV49157V thermal protection circuit the LV49157V includes a thermal protection circuit to prevent damage to or destruction of the ic should abnormal internal heat generation occur. this means that should the ic junction temperature (tj) rise above about 175 c due to inadequate heat dissipation or other reason, the thermal protection circuit will operate to stop ic operation should the temperature rise further. if the temperature is reduced by lowering the input level or other means, the thermal protection circuit will recover automatically (about 105 c). recovery attack internal tsd det. pwm internal tsd det. pwm 150 200 180 100 130 90 70 40 50 60 80 110 110 110 160 170 190 junction temperature tj [ c] temperature (tj) rise hystsrisis shut down temperature (tj) fall shut down function image * the thermal protection circuit is a function to avoid the abnormal state temporarily. unfortunately, we cannot guarantee that ic is not destroyed. no.a1567-16/30
LV49157V plc the plc (power level control) function is able to control the maximum index modulation by setting a value of external plc resistance r1 voluntarily, and prevent a pwm signal from becoming the over modulation mode. in addition, this circuit can be use as output power limit circuit because the plc function can set the maximum index modulation voluntarily, and variable from 2w to 15w with output power linearly in the state that made the power supply voltage and load resistance fixation. because the plc function can se t the suitable rated output with the same power supply voltage/speaker regardless of screen size in flat screen te levisions by this, set can plan the commonization of the board. furthermore, the plc function can reduce abnormal noise in the hard clip so that output wave pattern becomes the soft clip when it limited output power. max. power half power min. power gnd plc r1 5 13 LV49157V function image measuring condition vd = 15v, r l = 8 , l = 33 h (toko : a7502by-330m), c = 0.1uf,c l = 0.47 f,ta = 25 c r1 -- p o @thd + n = 10% 0 14 16 10 12 8 4 6 2 18 01 0 864 21 2 1 4 1 r1?k r1 [k ] po@10% [w] 3.0 0.694 3.6 1.073 4.7 1.982 6.2 3.642 7.5 5.562 8.2 6.855 9.1 8.591 10 10.64 13 15.32 15 15.94 20 16.01 vd = 15v r l = 8 fin = 1khz thd + n = 10% 2ch-drive aes17 ? w @thd + n = 10% p o 6 1 8 2 0 setting example of the output power limit value * when it is used this function as output power limit, pl ease use the high-precision resistance such as the metal film resistor when precision of the electricity value is necessary. * the value of external plc resistance r1 please connects more than 3k . * when it is changed a value of external plc resistance r1, please turn off an amplifier. no.a1567-17/30
LV49157V cut-off frequency calculation method and the output lc filter setting no.a1567-18/30 r l c c out + out - c l l l the cut off frequency fc of the output lc filter is calculated by the following formula. fc = 1 2 2lc l also, by setting the cut off frequency fc, the value of c l and l is calculated by using the following formula. c l = 1 2 2 r l fc l = 2 r l 4 fc in general, the value from 20% to 30% of c l is set to c. in case of fc = 30khz r l [ ] l [ h] c l [ f] c [ f] q 4 15 1 0.22 0.650 6 22 0.68 0.15 0.636 8 33 0.47 0.1 0.704 16 68 0.22 0.047 0.739 above formula is common calculation method and is a measure of constant setting. in fact, it is necessary to set with each se t that considers the speaker characteristics. in addition, please set the fixed number to become q 1 in currents in the fc neighborhood increasing if q value of the lc filter is big.
LV49157V glaph deta (digital amplifier: l = 33 h (toko : a7502by-330m), c = 0.1 f, c l = 0.47 f) ist -- vd 0 0.1 0.05 0.15 01 0 864 21 2 1 4 1 6 10864 21 2 1 4 1 6 10864 21 2 1 4 1 6 10864 21 2 1 4 1 6 18 ambient temperature, ta - c ist -- ta 0 0.05 0.1 0.15 ? 50 0 50 05 0 05 0 05 0 100 externally applied voltage, vd - v imute -- vd muting current, imute - ma 0 15 20 10 5 25 01 8 ambient temperature, ta - c imute -- ta muting current, imute - ma 0 10 5 15 20 25 ? 50 100 externally applied voltage, vd - v i cc -- vd quiescent current, i cc - ma 0 20 30 40 10 15 10 5 50 0 20 10 30 40 50 01 8 ambient temperature, ta - c i cc -- ta quiescent current, i cc - ma ? 50 100 externally applied voltage, vd - v v cc -- vd v cc - v 0 20 0 15 10 5 20 01 8 ambient temperature, ta - c v cc -- ta v cc - v ? 50 100 externally applied voltage, vd - v no.a1567-19/30
LV49157V biascap -- vd 0 4 6 8 2 4 6 8 2 10 01 0 864 21 2 1 4 1 6 10864 21 2 1 4 1 6 10864 21 2 1 4 1 6 10864 21 2 1 4 1 6 18 ambient temperature, ta ? c biascap -- ta biascap ? v 0 10 ? 50 0 50 05 0 05 0 05 0 100 externally applied voltage, vd ? v vbias -- vd vbias ? v 0 6 8 4 2 10 01 8 ambient temperature, ta ? c vbias -- ta vbias ? v 0 4 2 6 8 10 ? 50 100 externally applied voltage, vd ? v vreg5 -- vd vreg5 ? v 0 2 3 4 5 1 2 3 4 5 1 3 4 5 2 1 3 4 5 2 1 6 0 6 01 8 ambient temperature, ta ? c vreg5 -- ta vreg5 ? v ? 50 100 externally applied voltage, vd ? v v dd -- vd v dd ?v 0 6 0 6 01 8 ambient temperature, ta ? c v dd -- ta v dd ?v ? 50 100 externally applied voltage, vd ? v biascap ? v r l = 8 rg = 0 r l = 8 rg = 0 r l = 8 rg = 0 r l = 8 rg = 0 vd = 15v r l = 8 rg = 0 vd = 15v r l = 8 rg = 0 vd = 15v r l = 8 rg = 0 vd = 15v r l = 8 rg = 0 no.a1567-20/30
LV49157V vg -- vd 28 30 31 29 30 31 29 32 9 10.5 13.5 16.5 10.5 13.5 16.5 10.5 13.5 16.5 10.5 13.5 16.5 12 15 12 15 12 15 12 15 18 ambient temperature, ta -- c vg -- ta gain, vg -- db 28 32 --50 0 50 05 0 05 0 05 0 100 externally applied voltage, vd -- v voffset -- vd offset voltage, voffset -- mv --80 --60 --40 --20 0 --60 --40 --20 0 20 91 8 ambient temperature, ta -- c voffset -- ta offset voltage, voffset -- mv --80 20 --50 100 externally applied voltage, vd -- v thd+n -- vd total harmonic distortion, thd+n -- % 0.001 0.01 2 3 5 7 0.1 2 3 5 7 1 2 3 5 7 2 3 5 7 0.01 2 3 5 7 0.1 2 3 5 7 1 2 3 5 7 2 3 5 7 18 12 6 18 12 6 10 0.001 10 91 8 ambient temperature, ta -- c thd+n -- ta total harmonic distortion, thd+n -- % --50 100 externally applied voltage, vd -- v p o -- vd output power, p o -- w 0 24 0 24 91 8 ambient temperature, ta -- c p o -- ta output power, p o -- w --50 100 externally applied voltage, vd -- v gain, vg -- db r l = 8 fin = 1khz v o = 0dbm r l = 8 rg = 0 r l = 8 fin = 1khz p o = 1w 2ch-drive aes17 r l = 8 fin = 1khz 2ch-drive aes17 vd = 15v r l = 8 fin = 1khz p o = 1w 2ch-drive aes17 vd = 15v r l = 8 fin = 1khz 2ch-drive aes17 vd = 15v r l = 8 fin = 1khz v o = 0dbm vd = 15v r l = 8 rg = 0 ch2 ch1 ch2 ch1 ch2 ch1 thd+n = 10% thd+n = 1% thd+n = 10% thd+n = 1% ch2 ch1 no.a1567-21/30
LV49157V no.a1567-22/30 chsep. -- vd --100 --80 --60 --40 --20 --80 --60 --40 --20 0 9 10.5 13.5 16.5 10.5 13.5 16.5 10.5 13.5 16.5 10.5 13.5 16.5 12 15 12 15 12 15 12 15 18 ambient temperature, ta -- c chsep. -- ta channel separation, chsep. -- db --100 0 --50 0 50 05 0 05 0 05 0 100 externally applied voltage, vd -- v svrr -- vd ripple rejection ratio, svrr -- db --80 --60 --40 --20 --60 --40 --20 0 91 8 ambient temperature, ta -- c svrr -- ta ripple rejection ratio, svrr -- db --80 0 --50 100 externally applied voltage, vd -- v v no -- vd noise, v no -- mvrms 0.01 0.1 2 3 5 7 2 3 5 7 0.1 2 3 5 7 2 3 5 7 310 340 370 400 310 340 370 400 1 0.01 1 91 8 ambient temperature, ta -- c v no -- ta noise, v no -- mvrms --50 100 externally applied voltage, vd -- v f o -- vd oscillating frequency, f o -- khz 280 430 280 430 91 8 ambient temperature, ta -- c f o -- ta oscillating frequency, f o -- khz --50 100 externally applied voltage, vd -- v channel separation, chsep. - r l = 8 fin = 1khz rg = 0 v o = 0dbm din audio vd = 15v r l = 8 rg = 0 v o = 0dbm din audio db - ch1ch2 ch1ch2 ch2 ch2ch1 ch2ch1 r l = 8 fin = 100hz rg = 0 vdr = 0dbm din audio vd = 15v r l = 8 fin = 100hz rg = 0 vdr = 0dbm din audio ch1 ch1 ch2 r l = 8 rg = 0 a-weight vd = 15v r l = 8 rg = 0 a-weight ch2 ch2 ch1 ch1 r l = 8 rg = 0 vd = 15v r l = 8 rg = 0 ch1 ch1 ch2 ch2
LV49157V duty -- vd 45 50 50 55 91 2 10.5 13.5 16.5 15 100 23 57 1k 23 57 10k 23 57 23 57 100 23 57 1k 23 57 10k 2 3 57 2 3 57 23 57 100 23 57 23 57 10k 05 0 18 ambient temperature, ta -- c duty -- ta duty -- % 45 55 --50 0 50 05 0 05 0 100 frequency, f -- hz chsep. -- f no.a1567-23/30 channel separation, chsep. - - db --100 --80 --60 --40 --20 0 10 100k ripple frequency, fr -- hz svrr -- fr ripple rejection ratio, svrr -- db --80 --60 --40 --20 0 10 100k v no -- rg no 0.01 0.1 2 3 5 7 2 3 5 7 2.5 2.0 1.5 1 1.5 2.0 2.5 1.0 3.0 1 1000k ambient temperature, ta -- c high & low level -- ta high & low level -- v --50 100 ambient temperature, ta -- c high & low level -- ta 1.0 3.0 6 7 8 9 --50 100 ambient temperature, ta -- c upper & lower -- ta upper & lower -- v --50 100 externally applied voltage, vd -- v noise, v -- mvrms high & low level - - v duty -- % ch2 high low high low lower upper ch2 ch1 ch2 ch1 ch1 ch2 ch1 ch1?ch2 ch2?ch1
LV49157V thd+n -- p o 0.01 0.1 2 3 5 7 1 2 3 5 7 2 3 5 7 0.01 2 3 5 7 0.1 2 3 5 7 1 2 3 5 7 2 3 5 7 10 0.001 0.01 0.1 23 57 23 57 23 57 1 23 57 23 57 10 0.01 23 57 0.1 23 57 1 23 57 10 23 57 23 57 23 57 0.01 23 57 0.1 23 57 1 23 57 23 57 10 4 8 12 16 100 frequency, f -- hz thd+n -- f total harmonic distortion, thd+n -- % 0.001 10 10 100 23 57 23 57 23 57 23 57 1k 10k 100 2 3 57 2 3 57 2 3 57 2 3 57 1k 10k 100 23 57 1k 23 57 10k 23 57 23 57 12 16.5 13.5 10.5 15 100k output power, p o -- w thd+n -- p o total harmonic distortion, thd+n -- % 0.01 0.1 2 3 5 7 1 2 3 5 7 2 3 5 7 2 3 5 7 10 0.001 100 frequency, f -- hz thd+n -- f total harmonic distortion, thd+n -- % 0.001 0.01 2 3 5 7 0.1 2 3 5 7 2 3 5 7 1 10 10 100k output power, p o -- w thd+n -- p o total harmonic distortion, thd+n -- % 0.01 2 3 5 7 0.1 2 3 5 7 2 3 5 7 1 2 3 5 7 0.01 2 3 5 7 0.1 2 3 5 7 2 3 5 7 1 20 40 60 80 20 10 0.001 10 0.001 100 20 frequency, f -- hz thd+n -- f total harmonic distortion, thd+n -- % 10 100k output power, p o -- w efficiency -- p o efficiency -- % 0 100 0 10 30 0 externally applied voltage, vd -- v p o -- vd output power, p o -- w 91 output power, p o -- w total harmonic distortion, thd+n -- % 8 vd = 15v r l = 8 2ch-drive aes17 vd = 15v r l = 6 2ch-drive aes17 vd = 15v r l = 4 2ch-drive aes17 vd = 15v fin = 1khz 2ch-drive aes17 vd = 15v r l = 8 p o = 1w 2ch-drive aes17 vd = 15v r l = 6 p o = 1w 2ch-drive aes17 vd = 15v r l = 4 p o = 1w 2ch-drive aes17 fin = 1khz thd+n = 10% 2ch-drive aes17 fin = 6.67khz fin = 1khz fin = 100hz fin = 6.67khz fin = 1khz fin = 100hz fin = 6.67khz fin = 1khz fin = 100hz ch2 ch1 ch2 ch1 ch2 ch1 r l = 4 r l = 8 r l = 4 r l = 6 r l = 8 no.a1567-24/30
LV49157V response -- f --30 --20 --10 0 10 10 100 23 57 1k 23 57 10k 23 57 23 57 100k phase -- f phase -- deg --80 --60 --40 --20 0 20 40 10 100 23 57 23 57 23 57 23 57 1k 10k 100k response -- db frequency, f -- hz frequency, f -- hz no.a1567-25/30
LV49157V glaph deta (digital amplifier: l = 33 h (toko : a7502by-330m), c = 0.1 f, c l = 0.47 f) i cc hp -- vd 0 8 10 4 2 6 8 10 4 2 6 12 01 0 864 21 2 1 4 1 6 10864 21 2 1 4 1 6 10864 21 2 1 4 1 6 18 i cc hp -- ta i cc hp -- ma 0 12 --50 0 50 05 0 05 0 100 hp_rf -- vd hp_rf -- v 0 10 12 8 6 4 2 10 12 8 6 4 2 14 01 8 hp_rf -- ta hp_rf -- v 0 14 --50 100 hp_ref -- vd hp_ref -- v 0 2 3 1 2 3 1 4 0 4 01 8 hp_ref -- ta hp_ref -- v --50 100 i cc hp -- ma 10864 21 2 1 4 1 6 0 5 0 3 2 1 hp_out -- vd hp_out -- v 0 4 0 3 2 1 4 01 8 hp_out -- ta hp_out -- v --50 100 ambient temperature, ta -- c externally applied voltage, vd -- v ambient temperature, ta -- c externally applied voltage, vd -- v externally applied voltage, vd -- v ambient temperature, ta -- c externally applied voltage, vd -- v ambient temperature, ta -- c no.a1567-26/30
LV49157V vg -- vd 9.5 11.5 12.5 10.5 11.5 12.5 10.5 13.5 9 10.5 13.5 16.5 10.5 13.5 16.5 10.5 13.5 16.5 12 15 12 15 12 15 18 vg -- ta 9.5 13.5 --50 0 50 05 0 05 0 100 voffset -- vd --0.2 --0.1 0 0.1 --0.1 0 0.1 0.2 91 8 voffset -- ta --0.2 0.2 --50 100 thd+n -- vd 0.01 0.1 2 3 5 7 1 2 3 5 7 2 3 5 7 0.1 2 3 5 7 1 2 3 5 7 2 3 5 7 10 0.01 10 91 8 thd+n -- ta --50 100 ch2 ch1 ch2 ch1 ch2 ch1 ch2 ch1 ch2 ch1 ch2 ch1 10.5 13.5 16.5 12 15 0 50 60 40 20 60 40 20 p o -- vd 0 80 0 80 91 8 p o -- ta --50 100 thd+n = 10% thd+n = 1% thd+n = 10% thd+n = 1% ambient temperature, ta -- c gain, vg -- db externally applied voltage, vd -- v offset voltage, voffset -- mv ambient temperature, ta -- c offset voltage, voffset -- mv externally applied voltage, vd -- v total harmonic distortion, thd+n -- % ambient temperature, ta -- c total harmonic distortion, thd+n -- % externally applied voltage, vd -- v gain, vg -- db externally applied voltage, vd -- v output power, p o -- m w ambient temperature, ta -- c output power, p o -- m w no.a1567-27/30
LV49157V chsep. -- vd --100 --80 --60 --40 --20 --80 --60 --40 --20 0 9 10.5 13.5 16.5 10.5 13.5 16.5 10.5 13.5 16.5 12 15 12 15 12 15 18 chsep. -- ta --100 0 --50 0 50 05 0 05 0 100 svrr -- vd --100 --60 --80 --40 --20 --60 --80 --40 --20 0 91 8 svrr -- ta --100 0 --50 100 v no -- vd 0.01 2 3 5 7 2 3 5 7 0.1 0.01 0.1 91 8 v no -- ta --50 100 ch2 ch1 ch2 ch2 ch1 ch1 ch2 ch2 ch1 ch1 ch2 ch1 ch2 ch1 ch2 ch1 ambient temperature, ta -- c channel separation, chsep. -- db externally applied voltage, vd -- v ripple rejection ratio, svrr -- db ambient temperature, ta -- c ripple rejection ratio, svrr -- db externally applied voltage, vd -- v noise, v no -- mvrms ambient temperature, ta -- c noise, v no -- mvrms externally applied voltage, vd -- v channel separation, chsep. -- db no.a1567-28/30
LV49157V 23 57 frequency, f -- k hz response -- f response -- db -- 8 -- 6 -- 4 -- 2 4 2 0 0.01 0.1 23 57 1 23 57 10 23 57 23 57 100 1000 100 23 57 1k 23 57 10k 23 57 23 57 100 23 57 1k 23 57 10k 2 3 57 2 3 57 23 57 0.01 23 57 23 57 0.01 23 57 0.01 05 0 frequency, f -- hz chsep. -- f channel separation, chsep. -- db --100 --80 --60 --40 --20 --80 --60 --40 --20 0 10 100k ripple frequency, fr -- hz svrr -- fr ripple rejection ratio, svrr -- db --100 0 10 100k v no -- rg noise, v no -- mvrms 0.01 2 3 5 7 0.1 1.5 2.0 2.5 1.0 3.0 0.0001 10000 high & low level -- ta high & low level -- v --50 100 high low ch2 ch1 ch2 ch1 ch1?ch2 ch2?ch1 ambient temperature, ta -- c 23 57 100 23 57 1k 23 57 10k 23 57 23 57 output power, p o -- m w thd+n -- p o total harmonic distortion, thd+n -- % 0.01 2 3 5 7 0.1 2 3 5 7 2 3 5 7 1 2 3 5 7 0.1 2 3 5 7 2 3 5 7 1 10 0.01 10 0.01 0.1 23 57 23 57 1 23 57 10 100 frequency, f -- hz thd+n -- f total harmonic distortion, thd+n -- % 10 100k fin = 1khz fin = 10khz fin = 100hz ch2 ch1 no.a1567-29/30
LV49157V LV49157V sanyo semiconductor co.,ltd. assumes no responsib ility for equipment failures that result from using products at values that exceed, even momentarily, rate d values (such as maximum ra tings, operating condition ranges, or other parameters) listed in products specif ications of any and all sanyo semiconductor co.,ltd. products described or contained herein. sanyo semiconductor co.,ltd. strives to supply high-qual ity high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. it is possible that these probabilistic failures or malfunction could give rise to acci dents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause dam age to other property. when designing equipment, adopt safety measures so that these kinds of accidents or e vents cannot occur. such measures include but are not limited to protective circuits and error prevention c ircuits for safe design, redundant design, and structural design. upon using the technical information or products descri bed herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of sanyo semiconductor co.,ltd. or any third party. sanyo semiconductor co.,ltd. shall not be liable f or any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. information (including circuit diagr ams and circuit parameters) herein is for example only; it is not guaranteed for volume production. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equi pment, refer to the "delivery specification" for the sanyo semiconductor co.,ltd. product that you intend to use. in the event that any or all sanyo semiconductor c o.,ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities conc erned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any in formation storage or retrieval system, or otherwise, without the prior written consent of sanyo semiconductor co.,ltd. ps no.a1567-30/30 sanyo semiconductor co.,ltd. assumes no responsib ility for equipment failures that result from using products at values that exceed, even momentarily, rate d values (such as maximum ra tings, operating condition ranges, or other parameters) listed in products specif ications of any and all sanyo semiconductor co.,ltd. products described or contained herein. sanyo semiconductor co.,ltd. strives to supply high-qual ity high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. it is possible that these probabilistic failures or malfunction could give rise to acci dents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause dam age to other property. when designing equipment, adopt safety measures so that these kinds of accidents or e vents cannot occur. such measures include but are not limited to protective circuits and error prevention c ircuits for safe design, redundant design, and structural design. upon using the technical information or products descri bed herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of sanyo semiconductor co.,ltd. or any third party. sanyo semiconductor co.,ltd. shall not be liable f or any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. information (including circuit diagr ams and circuit parameters) herein is for example only; it is not guaranteed for volume production. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equi pment, refer to the "delivery specification" for the sanyo semiconductor co.,ltd. product that you intend to use. in the event that any or all sanyo semiconductor c o.,ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities conc erned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any in formation storage or retrieval system, or otherwise, without the prior written consent of sanyo semiconductor co.,ltd. this catalog provides information as of november, 2009. specifications and inform ation herein are subject to change without notice. ps no.a1567-30/30

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